HDL may refer to one of the following Hardware description language High density lipoprotein , so called good cholesterol . Hong Kong Disneyland , in China. Les Hurlements d L o , an alternative rock band from France. GE HDL diesel engine disambig Category Initialisms de HDL es HDL fr HDL it HDL nl HDL ja HDL pl HDL zh HDL ... more details
primarysources date August 2009 Infobox Game title HDL Universal Tactical Role playing System image Image Hdlcover.png 228px caption HDL Basic Rules cover designer Sean Boyle publisher Tremorworks, LLC date 2006 1st version years 2006 present random chance Dice rolling playing time Varies genre Generic system HDL Universal Tactical Role playing System HDL System web http tremorworks.com hdl system The HDL Universal Tactical Role Playing System is a role playing game system produced by Tremorworks, LLC . Details HDL is a flexible, simple system of rules that are adaptable to a great number or settings, allowing them to be used as alternate rules for existing games or as a mechanic for running campaigns of your own design. Unlike other universal gaming systems, HDL s focus is on simplicity and realism. To play, all you need is the main book a small and inexpensive volume as compared to many others , a set of HDL cards, and a few dice. There is no need to purchase a slew of required supplemental information everything you need is in one book. Character creation is point based allocate 65 points to stats, ranging from 1 to 10, and 5 points to Backgrounds. Additional Background Points can be gained by taking Weaknesses. Skill Points are determined by the top three mental stats Reason, Knowledge, and Resolve. The final step is to draw a Background Card, to help fill in some aspect of the character ... to re roll poor dice rolls. The HDL namesake originates from the dice mechanic for the game, called ... the die rolled. The number equals half the sides on the die. Thus, HDL 2 1d4, HDL 6 1d12, and HDL 10 2d10. In general, all rolls are based on an HDL equal to a certain stat, plus the character s rating ..., or the Coordination stat, and the Sword Slashing skill, so a character would roll the HDL of his ... hdl system More Info on the HDL System http www.rpg.net reviews archive 12 12810.phtml HDL System Review from RPG.net http www.flamesrising.com hdl system rpg review HDL System Review from flamesrising.com ... more details
Flow to HDL tools and methods convert flow based system design into a hardware description language HDL such as VHDL or Verilog . Typically this is a method of creating designs for field programmable gate array , application specific integrated circuit prototyping and DSP Clarify me date February 2009 design. Flow based system design is well suited to field programmable gate array design as it is easier to specify the innate parallelism of the architecture. History The use of flow based design tools in engineering is a reasonably new trend. Unified Modeling Language is the most widely used example for software design. The use of flow based design tools allows for more holistic system design and faster development. C to HDL tools and flow have a similar aim, but with C programming language C or C like programming language s. Applications Most applications are ones which take too long with existing supercomputer architectures. These include bioinfomatics, Computational fluid dynamics CFD , financial processing and oil and gas survey data analysis. Embedded applications that require high performance or real time data processing are also an area of use. System on a chip design can also be done using this flow. Examples Xilinx System Generator from http www.Xilinx.com Xilinx StarBridge VIVA from defunct s http www.starbridgesystems.com StarBridge Systems s External links http www.cse.clrc.ac.uk disco publications FPGA overview 2.0.pdf an overview of flows by Daresbury Labs. http www.xilinx.com products design tools logic design advanced esl index.htm Xilinx s ESL initiative, some products listed and C to VHDL tools. See also Commons category ASIC Application Specific Integrated Circuit ASIC C to HDL Comparison of Free EDA software Comparison of EDA Software Complex programmable ... Gate Array FPGA HDL Handel C Icarus Verilog JHDL Lustre programming language MyHDL Open source ... Flow To Hdl Category Hardware description languages ... more details
C to HDL tools convert C programming language C or C like source code computer program code into a hardware description language HDL such as VHDL or Verilog . The converted code can then be synthesized and translated into a hardware device such as a field programmable gate array . The motivation for this is that writing in a hardware description language can be tedious and time consuming. C to RTL is another name for this methodology. RTL refers to the register transfer level representation of a program necessary to implement it in logic. History Early development on C to HDL was done by Ian Page, Charles Sweeney and colleagues at Oxford University in the 1990s who developed the Handel C language. They commercialized their research by forming Embedded Solutions Limited ESL in 1999 which was renamed Celoxica in September 2000. In 2008, the embedded systems departments of Celoxica was http www.eetimes.com news semi rss showArticle.jhtml?articleID 205208538&cid RSSfeed eetimes semiRSS sold to Catalytic for 3 million and which later merged to become Agility Computing. In January 2009, Mentor Graphics acquired Agility s C synthesis assets. ref cite web url http www.eetimes.com news semi showArticle.jhtml?articleID 212902054 title Mentor buys Agility s C synthesis assets author Dylan McGrath date Published 01 22 2009 publisher EETimes.com ref Celoxica continues to trade concentrating ... Celoxica.com ref Applications C to HDL techniques are most commonly applied to applications that have ... of C to HDL techniques. C to VHDL compilers are very useful for large designs or for implementing code that might change in the future. Designing a large application entirely in HDL may be very ... reduce total development time. Furthermore, an application coded in HDL will almost certainly ... than remodelling the equivalent HDL code. Flow to HDL tools have a similar aim, but with flow rather ... ROCCC 2.0 free and open source C to HDL tool from http jacquardcomputing.com Jacquard Computing Inc ... more details
Summary Tuning house of NDB HDL Plankstadt, Germany, photographed by myself on July 9th, 2006 Licensing GFDL migration relicense Orphan image ... more details
Summary Non free use rationale Article HDL System Description Cover of the HDL Basic Rules Source http tremorworks.com hdl system hdl basic rules Portion All Low resolution Yes Purpose Product Image Replaceability Official image of cover by Tremorworks, LLC other information Imaged uploaded by owner of Tremorworks, LLC. Image is from company press kit. Licensing Non free book cover ... more details
High density lipoprotein HDL is one of the five major groups of lipoprotein s, which, in order of sizes ... lipoprotein IDL , Low density lipoprotein LDL , and HDL , which enable lipids like cholesterol and triglycerides ... percent of blood cholesterol is carried by HDL. ref name am180 Cite web url http www.americanheart.org presenter.jhtml?identifier 180 title LDL and HDL Cholesterol What s Bad and What s Good? publisher ... report HDL C level, i.e. the amount of cholesterol contained in HDL particles. It is often contrasted with low density or Low density lipoprotein LDL cholesterol or LDL C. HDL particles are able to remove cholesterol from within artery atheroma Citation needed reason need a citation that HDL can ... or re utilization, which is the main reason why the cholesterol carried within HDL particles HDL C is sometimes called good cholesterol despite the fact that it is exactly the same as the cholesterol in LDL particles . Those with higher levels of HDL C seem to have fewer problems with cardiovascular diseases , while those with low HDL C cholesterol levels less than 40 mg dL or about ... higher HDL levels are correlated with cardiovascular health, no incremental increase in HDL has been proven to improve health. In other words, while high HDL levels might correlate with better cardiovascular health, specifically increasing one s HDL might not increase cardiovascular health. ref name ... few individuals producing an abnormal, apparently more efficient, HDL ApoA1 protein variant called ApoA 1 Milano , have low measured HDL C levels yet very low rates of cardiovascular events even with high ... subpopulation of lipo mutants... date September 2010 Structure and function HDL is the smallest of the lipoprotein ... synthesized HDL spherical. They increase in size as they circulate through the bloodstream and incorporate ... . HDL transports cholesterol mostly to the liver or Steroidogenesis steroidogenic organs such as adrenal s, ovary , and testes by direct and indirect pathways. HDL is removed by HDL receptors such as SCARB1 ... more details
In electronics , a hardware description language or HDL is any language from a class of computer language ... structure and behaviour of electronic systems. Like concurrent programming languages, HDL syntax ... major HDL to offer object orientation and garbage collection. Using the proper subset of virtually any ... used to design finite state machines. The first modern HDL, Verilog , was introduced by Gateway Design Automation in 1985. Cadence Design Systems later acquired the rights to Verilog XL, the HDL simulator ... circuit designs already captured and described in another form such as a schematic file. HDL simulation ... of digital design. Synthesis tools compiled HDL source files written in a constrained format ... circuitry. In short, logic synthesis propelled HDL technology into a central role for digital ... share many of the same limitations neither HDL is suitable for analog Mixed signal integrated circuit ... s improvements. Design using HDL Efficiency gains realized using HDL means a majority of modern ... applications, or entered in a state diagram editor. The process of writing the HDL description is highly dependent on the nature of the circuit and the designer s preference for coding style . The HDL ... repetitive circuit structures in the HDL language. Special text editors offer features for automatic ... declaration. The HDL code then undergoes a code review, or auditing. In preparation for synthesis, the HDL .... This process aids in resolving errors before the code is synthesized. In industry parlance, HDL design generally ends at the synthesis stage. Once the synthesis tool has mapped the HDL description ... more laden with technology specific information, which cannot be stored in a generic HDL ... HDL code Main Logic simulation Essential to HDL design is the ability to simulate HDL programs. Simulation allows an HDL description of a design called a model to pass Functional verification ... against the code implementation in the HDL description. It also permits architectural exploration ... more details
Summary Source http www.wisconsinhistory.org wlhba articleView.asp?pg 2&id 2891&hdl &np &adv yes&ln &fn &q &y1 &y2 &ci &co Milwaukee&mhd &shd Creator N A first published prior to January 1, 1923 Licensing PD US Orphan image ... more details
Refimprove date April 2011 Reverse cholesterol transport is a multi step process resulting in the net movement of cholesterol from peripheral tissues back to the liver via the plasma. ref cite journal last Tall first AR pmid 9519340 title An overview of reverse cholesterol transport. ref Cholesterol from non hepatic peripheral tissues is transferred to High density lipoprotein HDL by the ABCA1 ATP binding cassette transporter . ApoA 1 acts as an acceptor, and the phospholipid component of HDL acts as a sink for the mobilised cholesterol. The cholesterol is converted to cholesteryl ester s by the enzyme LCAT lecithin cholesterol acyltransferase . The cholesteryl esters can be transferred, with the help of the cholesterol ester transfer protein CETP in exchange for triglycerides, to other lipoprotein s such as Low density lipoprotein LDL and VLDL , and these lipoproteins can be taken up by the liver through its LDL receptor s. ref QJM December 2005 98 12 845 856. doi 10.1093 qjmed hci136. ref However, the receptor SR B1 SCARB1 scavenger receptor class B1 present on the liver cells plasma membrane s mediates most of the liver s uptake of cholesteryl esters from HDL in the absence of uptake of apolipoprotein s. The overall process by which HDL removes cholesterol from extrahepatic tissues and returns it to the liver is called reverse cholesterol transport. Once in the liver, the cholesteryl esters are converted to cholesterol and enter the general pool. Therefore, the liver can eliminate cholesterol from the body by secreting unesterified cholesterol into the bile or by converting cholesterol to bile acid s. Uptake of HDL sub 2 sub is mediated by hepatic lipase , a special form of lipoprotein lipase found only in the liver. Hepatic lipase activity is increased by androgen s and decreased by estrogen s, which may account for higher concentrations of HDL sub 2 sub in women. References reflist DEFAULTSORT Reverse Cholesterol Transport Category Biochemistry ... more details
Multiple issues notability June 2009 primarysources June 2009 orphan February 2009 Tremorworks, LLC is a game company that creates and publishes role playing and board game s. Founded in 2006, it hails itself as an Independent Publishing Company. Games published Board games ElementaliS , a push your luck die rolling game with spellcasting elements Elementalis Creationists and Elitists Expansion Elementalis Chaotica and Cultists Expansion Elementalis Guardians and Luminaries Expansion Roleplaying games HDL System , A flexible, simple system of rules that are adaptable to a great number or settings, allowing them to be used as alternate rules for existing games or as a mechanic for running campaigns of your own design. HDL Basic Rulebook Demongate High game setting Perfect Horizon game setting LUCID Dreamscape Reality game setting External links http tremorworks.com Official site Category Board game publishing companies Category Role playing game publishing companies ... more details
In the field of molecular biology , apolipoprotein C is a family of four low molecular weight apolipoprotein s, designated as Apolipoprotein C1 C I , APOC2 C II , Apolipoprotein C3 C III , and Apolipoprotein C4 C IV that are surface components of chylomicron s, very low density lipoprotein VLDL , and high density lipoprotein HDL . In the fasting state, the C apolipoproteins are mainly associated with HDL. During absorption of dietary fat, the C apoli poproteins preferentially redistribute to the surface of the triglyceride rich chylomicrons and VLDL. ref name pmid6099394 cite journal author Mahley RW, Innerarity TL, Rall SC, Weisgraber KH title Plasma lipoproteins apolipoprotein structure and function journal J. Lipid Res. volume 25 issue 12 pages 1277 94 year 1984 month December pmid 6099394 doi url issn ref References Reflist protein stub Category Proteins ... more details
and updating existing standards e.g. VHDL , SystemVerilog . br Aldec provides HDL simulation engine ... Active HDL FPGA development environment built around common kernel HDL simulator. Supports text based .... Special versions of the software that support just one FPGA vendor are available, e.g. Active HDL Lattice Edition . Only available on MS Windows platform. Riviera PRO high end HDL simulator targeting ASIC and large FPGA designs. Riviera extends Active HDL s simulation features with support for advanced ... purpose Intellectual Property blocks created by Aldec and its partners, validated in Active HDL and Riviera environments. Hardware HES solution allowing acceleration of HDL simulation 10x to 50x verification ... Simulation and HDL Simulation results via waveform format. Education Aldec provides ... . Aldec also offers a special Student Edition of Active HDL, downloadable from Aldec s website ... to HDL based design. After adding Verilog support, Active VHDL was renamed to Active HDL and is still available as of 2007 . In 2000 ALDEC released high performance HDL simulator working not only ... HES Platform that allows hardware acceleration of HDL simulation and incremental prototyping of hardware ... silicon vendors. Trivia Student Edition of Active HDL was the first HDL simulator to be sold at Walmart ... more details
Specman is an Electronic design automation EDA tool, that provides advanced automated Functional verification of hardware designs. It provides an environment for working with, compiling, and debugging testbench environments written in the e verification language e Hardware Verification Language . Specman also offers automated testbench generation to boost productivity in the context of block, chip, and system verification. The Specman tool itself does not include an HDL simulation environment such as VHDL or Verilog . To simulate an e testbench with a design written in VHDL Verilog, Specman must be run in conjunction with a separate HDL simulation tool. In principle, Specman can co simulate with any HDL simulator supporting standard PLI or VHPI interface, such as Cadence s NCSim NC Sim or Verilog XL, Synopsys s http www.synopsys.com Tools Verification FunctionalVerification Pages VCS.aspx VCS , or Mentor s http model.com ModelSim . But in practice, Specman is used almost exclusively with NCSim NC Sim , where tighter product integration with NC Sim offers both faster runtime performance and debug capabilities not available with other HDL simulators. History Specman was originally developed at Verisity , an Israel based company, which was acquired by Cadence Design Systems Cadence on April 7, 2005. It is now part of the Cadence s functional verification suite, Incisive Enterprise Simulator , although Specman can still be licensed as a standalone product. References Reflist External links You can find related articles in http www.cadence.com community posts teamspecman.aspx The e language blog Team Specman http www.asic world.com specman http www.specman verification.com http www.cfs vision.com Editor Syntax Highlighting Modes http www.specman mode.com specman mode.html Emacs Specman Mode http www.specman mode.com specman vim.html VIM Specman Mode http www.dvteclipse.com DVT Category Hardware verification languages computer stub mk Specman ... more details
In integrated circuit design , VerilogCSP is a set of Macro computer science macros added to Verilog HDL to support Communicating Sequential Processes CSP channel communications. These macros are intended to be used in designing Asynchronous circuit digital asynchronous circuits . VerilogCSP also describes nonlinear Pipeline computing pipelines and high level channel timing properties, such as forward and backward Latency engineering latencies , minimum cycle time, and slack. External links http jungfrau.usc.edu new research current verilogcsp index.html VerilogCSP Homepage Category Integrated circuits ... more details
Automatic taxobox fossil range Fossil range Early Cambrian Tannuella is a genus of helcionellid known from Lower Cambrian strata. It has a high, septate shell similar to that of hypseloconid s such as Knightoconus . These genera were once considered ancestral cephalopods, but are now assigned to the helconellid s or putatively the tergomyan s i.e. Cambrian monoplacophora . ref cite hdl 1959.14 41429 ref reflist paleo mollusc stub Category Helcionellidae ... more details
part shows the normal simulation path where the design files must be compiled for an HDL simulator. The right ... between the emulation system and the HDL simulator. The interface is necessary for the simulator ... designs with an HDL simulator is a tedious task. When the designer transfers parts of the design to an emulation system and co simulates them with the HDL simulation, the simulation run times can be decreased ... more details
The Harry Diamond Laboratories HDL began in 1940, though that name was not given to the organization until 1962. In 1992, HDL was one of seven Army laboratories merged into a new organization, the Army Research Lab . ref http www.arl.army.mil www DownloadedInternetPages CurrentPages AboutARL ARL History1992 2003.pdf History of the Army Research Lab pdf ref History In 1940, concerned about increasing warfare abroad, the National Defense Research Committee organized a group of scientists and engineers into the Ordnance Development Division of the National Bureau of Standards NBS , to develop fuzes for non rotating fin stabilized munitions such as bombs, rockets and mortar shells. Harry Diamond engineer Harry Diamond , a pioneer radio engineer, was given technical direction of the program, a position he held until his death in 1948. Proximity fuze s were first used in combat in January 1943, and the U.S. War Department later described the proximity fuze as one of the outstanding scientific developments of World War II ... second only to the atomic bomb in military importance. In 1952, the Ordnance Development Division was transferred from NBS to the Army as a research and development R&D installation ref cite web url http permanent.access.gpo.gov lps1514 nvl.nist.gov pub nistpubs sp958 lide html 038 042.html title Development of the Visual Type Airway Radio Beacon System accessdate ... Diamond Laboratories HDL . AMC later established the Electronics Research and Development Command ERADCOM as subordinate command, with HDL reporting to that command. HDL was subsequently transferred to the Army Laboratory Command LABCOM . In 1972, Jack Anderson columnist Jack Anderson reported that HDL ... seven existing Army laboratories including HDL. Locations In 1940, the laboratory was located at Connecticut ... Carollo ref By the 1960s, HDL occupied a modern research facility located on convert 137 acre km2 in Adelphi ... testing there. In 1989, the commander of the HDL said that the decision to stop this testing was mainly ... more details
Verilog HDL originated at Automated Integrated Design Systems later renamed as Gateway Design Automation in 1985. The company was privately held at that time by Dr. Prabhu Goel, the inventor of the PODEM test generation algorithm. ref Goel s role in PODEM invention briefly described in Alberto Sangiovanni Vincentelli. November December 2003 The Tides of EDA. IEEE Design and Test of Computers . p.62. Viewed 20 September 2006 at http embedded.eecs.berkeley.edu Respep Research asves journal2003 ASV ieee design and test03.pdf UC Berkeley web site . ref Verilog HDL was designed by Phil Moorby ref Design Automation Conference. 2006 . Awards pdf . http www.dac.com 43rd PDFs awards.pdf search 22IEEE 20Phil 20Moorby 22 DAC web site p. 2 ref , who was later to become the Chief Designer for Verilog XL and the first Corporate Fellow at Cadence Design Systems . Gateway Design Automation grew rapidly with the success of Verilog XL and was finally acquired by Cadence Design Systems, San Jose, California San Jose , California CA in 1989. nowiki Citations added. nowiki ref http www.verilog.com Verilog.com viewed 20 September 2006. ref References references ict company stub Category Electronic design automation companies ... more details
Unreferenced date November 2010 Very low density lipoprotein VLDL is a type of lipoprotein made by the liver . VLDL is one of the five major groups of lipoproteins chylomicrons , VLDL, LDL low density lipoprotein , intermediate density lipoprotein , high density lipoprotein that enable fats and cholesterol to move within the water based solution of the bloodstream. VLDL is assembled in the liver from triglycerides , cholesterol , and apolipoprotein s. VLDL is converted in the bloodstream to low density lipoprotein LDL . VLDL particles have a diameter of 30 80 nanometers nm . VLDL transports endogeny endogenous products, whereas chylomicrons transport exogenous dietary products. Function VLDL transports endogenous triglycerides , phospholipids , cholesterol , and cholesteryl esters. It functions as the body s internal transport mechanism for lipids. Changes during circulation Nascent VLDL released from the liver contains Apolipoprotein B100 , apolipoprotein C1 apoC1 , apolipoprotein E apoE , cholesterol , Cholesteryl ester cholestryl esters , and triglycerides . As it circulates in blood, it picks up apolipoprotein C II apoC II and additional apoE donated from high density lipoprotein HDL . At this point, nascent VLDL becomes a mature VLDL. Once in circulation, VLDL will come in contact with lipoprotein lipase LPL in the capillary beds in the body adipose, cardiac, and skeletal muscle . LPL will remove triglycerides from VLDL for storage or energy production. VLDL now meets back up with HDL where apoC II is transferred back to HDL but keeps apoE . HDL also transfers cholesteryl esters to the VLDL in exchange for phospholipids and triglycerides via cholesteryl ester transfer protein CETP . As more and more triglycerides are removed from the VLDL because of the action of LPL and CETP enzymes, the composition of the molecule changes, and it becomes intermediate density lipoprotein IDL . Fifty percent of IDLs are recognized by receptors in the liver cells because of the ... more details
in lymph and blood, chylomicrons exchange components with high density lipoprotein s HDL . The HDL ... are distributed, the chylomicron returns APOC2 to the High density lipoprotein HDL but keeps APOE , and, thus ... more details
HDL cholesterol to Very low density lipoprotein very low density or low density lipoprotein s VLDL or LDL . Inhibition of this process results in higher HDL levels the good cholesterol containing ... more details
primarysources date August 2009 Orphan date November 2006 In integrated circuit design , VerilogCSP is a set of Macro computer science macros added to Verilog HDL to support Communicating Sequential Processes CSP channel communications. These macros are intended to be used in designing Asynchronous circuit digital asynchronous circuits . VerilogCSP also describes nonlinear Pipeline computing pipelines and high level channel timing properties, such as forward and backward Latency engineering latencies , minimum cycle time, and slack. External links http jungfrau.usc.edu new research current verilogcsp index.html VerilogCSP Homepage Category Hardware description languages ... more details
Citations missing date July 2010 DIME C is a C to HDL tool developed by Nallatech it is part of their DIMEtalk Design Tools suite. It includes an editor, a compiler and a parallelization visualizer. It supports the majority of ANSI C. It generates VHDL. External links http www.nallatech.com Nallatech http www.nallatech.com index.php FPGA Development Tools dimetalk.html DIMEtalk page on Nallatech s website. http www.cse.clrc.ac.uk disco publications FPGA overview 2.0.pdf Daresbury Labs Overview an overview of flows by Daresbury Labs, includes DIME C. Category Gate arrays Category Electronic design automation software programming software stub ... more details
protein Name apolipoprotein A II caption image width HGNCid 601 Symbol APOA2 AltSymbols EntrezGene 336 OMIM 107670 RefSeq NM 001643 UniProt P02652 PDB ECnumber Chromosome 1 Arm q Band 21 LocusSupplementaryData q23 Apolipoprotein A2 is an apolipoprotein found in high density lipoprotein HDL cholesterol in Blood plasma plasma . It has an approximate molecular weight 17 Dalton unit KDa ref http emedicine.medscape.com article 121187 overview ref . References Reflist 2 External links MeshName Apolipoprotein A II gene 1 stub Lipoproteins Category Apolipoproteins ru A2 ... more details
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